Electronic Sub-Systems Design Verification Engineer
|Job Type||Permanent Full Time|
- Electronic Subsystem Design Verification Engineer – Stevenage
£35000 - £45000, Overtime Pay, Bonus, 25 Days Holiday, Pension, Healthcare, Excellent Benefits
Our client designs and manufactures electronic systems for products used in the aerospace and defence industries. Working on multi-million pound international projects the Subsystem Design Verification Team is responsible for independently assessing the compliance of subsystem products to requirement.
- Test, validation and verification of electronic subsystem design.
- Plan how the evidence for assessment is generated and actively obtain the evidence
- Identify, plan and implement subsystem verification tasks
- Lead activities for specific projects
- Plan and implement trials following identification of verification tasks, gathering of design statements.
- Define test equipment needed for trials
- Knowledge of product verification processes and where they fit in the product design lifecycle
- Knowledge of current electronic design technologies – able to understand complex electronic circuits. Primarily a hardware role (knowledge of software/embedded firmware code useful)
- Able to challenge poor requirements and subsequently agree provable requirement documentation in collaboration with design teams
- Knowledge of: defence or other electrical and environmental standards (e.g. Stanag 1008, Def Stan 07-85, Def Stan 59-411, MIL-STD-810); EMC and its implications for subsystem electronics; reliability and safety principles.
- Familiarity with the DOORS requirements verification tool (training can be given)
- Possess excellent analytical and problem solving skills, have excellent verbal communication, negotiation and influencing skills and the capability to write clear, concise engineering documentation.
- Have the pro-activeness, motivation, ability and tenacity to deliver design verification activities on time and to cost.
- Ability to lead small teams of up to 3 people in all Verification activities on a project would be an advantage. Formal project management activities will be minimal.